This structure defines various settings for the neoVI Fire device.
Remarks
Deprecated. Enable and disable CGI using the network_enables element.
CGI network baud rate: 625 = 625,000kb 115 = 115,200kb
CGI network - Number of bits separating transmit frames. neoVI will ensure this number of idle bit times in between successive transmitted frames. Valid values (1-65535). Default value = 13
CGI network - Number of bits separating received frames. neoVI identifies the end of a rx frame when there is no CGI bus activity for this given number of bit times. Valid values (1-65535). Default value = 13
If enabled neoVI will append a 16 bit checksum to all transmitted frames. 1 to enable, 0 to disable. Default value = 1
Bitfield containing the software license enables. Depending on the hardware license purchased the customer may have to conditionally select which hardware channels to enable. For example the neoVI Red license allows the user to enable any 2 Dual Wire CAN channels and any 2 LIN channels. To enable a specific network its corresponding bit must be set (1). In order to transmit or receive on a network it must be enabled. Bit field values:
Examples: Enable HSCAN1 and HSCAN2: network_enables = 33 (21 hex) (0000000000100001 binary) Enable all networks: network_enables = 65535 (FFFF hex) (1111111111111111 binary)
Normally neoVI only initiates its comm channels when CoreMini is running or if neoVI is online with DLL/Vehicle Spy 3. Practically this means the the CAN controllers stay in Listen Only mode until the device goes online. Once online the neoVI loads the user settings. Setting this parameter to 1 will change this behavior so that the neoVI enables its controllers immediately on boot. Default value = 0
Number of milliseconds of no bus activity required before neoVI enters low power mode. Note pwr_man_enable must be set for power management to be enabled. Default value = 10000
1 = enable Power Management, 0 = disable. Default value = 0
MISC IO Initial Data Direction Register. Controls the initial data direction of the tri-states on all misc digital pins. Each bit corresponds to an individual misc pin. Bit value of 0 signifies an input and bit value 1 signifies and output. Bit values corresponding to non existent pins (EX MISC7-MISC15 on FIRE) have no effect. Default value = 0 Examples: Set MISC1 to be output, all else input: misc_io_initial_ddr = 1 Set MISC1and MISC2 to be output, all else input: misc_io_initial_ddr = 3 (11 binary) Set all MISC pins to output: misc_io_initial_ddr = 65535 (1111111111111111 binary)
MISC IO Initial Latch Register. Controls the initial output latch value on all misc digital pins. Each bit corresponds to an individual misc pin. Bit value of 0 signifies an low voltage (ground) and bit value 1 signifies high voltage (3.3 V). Bit values corresponding to non existent pins (EX MISC7-MISC15 on FIRE) have no effect. Default value = 0 Examples: Set MISC1 to be high, all else low: misc_io_initial_latch = 1 Set MISC1and MISC2 to be high, all else low: misc_io_initial_latch = 3 (11 binary) Set all MISC pins to high: misc_io_initial_latch = 65535 (1111111111111111 binary) Note: In order for digital outputs to work correctly the corresponding bit in misc_io_initial_ddr must be set to output and corresponding bit in misc_io_analog_enable must be cleared.
MISC IO Analog Enable Register. Controls the initial analog enables on all misc analog pins. Each bit corresponds to an individual misc pin that supports analog input. Bit value of 0 signifies that corresponding misc pin is digital only, and bit value 1 signifies corresponding misc pin is analog. Note that because some MISC pins are not capable of analog they are not included in the register. For example neoVI FIRE's analog pins are MISC3-MISC6, therefore bit 0 corresponds to MISC3's analog enable. Bit values corresponding to non existent pins have no effect. Default value = 0 Examples: Set MISC3 to be analog, all else digital. (neoVI FIRE) : misc_io_analog_enable = 1 Set MISC3 and MISC4 to be analog, all else digital. (neoVI FIRE): misc_io_analog_enable = 3 (11 binary) Set all MISC pins to high: misc_io_analog_enable = 65535 (1111111111111111 binary)
Note: that in order for analog inputs to work correctly the corresponding bit in misc_io_analog_enable must be set to 1.
Period in milliseconds of device report message holding digital and analog data. Default value = 100 Note: Periodic reporting requires misc_io_on_report_events[0] to be set.
Bitfield holding enables for various report triggers for the General IO report. Default value = 0 Bit field values:
Controls how long the Analog to Digital Converter samples before preforming a convert in milliseconds. If it is set to zero the hardware will perform the conversion immediately after sampling. This option defaults to 0 but is accessible so that high impedance analog sources can still be used by manually increasing the sample period. Default value = 0
Percent of full voltage change required to trigger a REPORT_ON_MISCX_AIN event. Valid range is 0-100. Default value = 0 Examples: Report fires every time ADC value changes: ain_threshold = 0 Report fires every time ADC value changes by 33 mV: ain_threshold = 1 Report fires every time ADC value changes by 66 mV: ain_threshold = 2 Report fires every time ADC value changes by 3.3 V (Unpractical): ain_threshold = 100 Note: Periodic reporting requires proper misc_io_on_report_events bit to be set.
In an ISO15765-2 Transmission, the receiver transmits a flow control message that informs that transmitter how much time there should be between individual CAN messages. This parameter allows the user to shift that spacing to make it smaller or larger. Valid range is -1563 to 1563 units where each unit represents 6.4us. Defaults to 0. If IFS plus the offset is negative than the Tx Messages will be back to back. Default value = 0 Examples: ISO15765-2 Tx Message Inner frame spacing is exactly what is specified in flow control message: iso15765_separation_time_offset = 0 ISO15765-2 Tx Message Inner frame spacing is what's specified in flow control message.+ 998.4 us: iso15765_separation_time_offset = 156 ISO15765-2 Tx Message Inner frame spacing is what's specified in flow control message.- 998.4 us: iso15765_separation_time_offset = -156
Bitfield containing the software license enables. Depending on the hardware license purchased the customer may have to conditionally select which hardware channels to enable. For example the neoVI Red license allows the user to enable any 2 Dual Wire CAN channels and any 2 LIN channels. To enable a specific network its corresponding bit must be set (1). In order to transmit or receive on a network it must be enabled. Bit field values:
ISO9141 Parity setting: 0 - no parity, 1 - even, 2 - odd
ISO9141 message termination setting: 0 - use inner frame time 1 - GME CIM-SCL
enables the 510 ohm pull-up resistor on K Line
ISO9141 Parity setting: 0 - no parity, 1 - even, 2 - odd
ISO9141 message termination setting: 0 - use inner frame time 1 - GME CIM-SCL
ISO9141 Parity setting: 0 - no parity, 1 - even, 2 - odd
ISO9141 message termination setting: 0 - use inner frame time 1 - GME CIM-SCL
ISO9141 Parity setting: 0 - no parity, 1 - even, 2 - odd
ISO9141 message termination setting: 0 - use inner frame time 1 - GME CIM-SCL
Bitfield containing the channels to fast wakeup on. Currently only HS and MS CAN are supported
Power management must be enabled for this feature to work.
can1
See structure
can2
See structure
can3
See structure
can4
See structure
swcan
See structure
lsftcan
See structure
lin1
See structure
lin2
See structure
lin3
See structure
lin4
See structure
cgi_enable_reserved
cgi_baud
cgi_tx_ifs_bit_times
cgi_rx_ifs_bit_times
cgi_chksum_enable
network_enables
network_enabled_on_boot
pwm_man_timeout
pwr_man_enable
misc_io_initial_ddr
misc_io_initial_latch
misc_io_analog_enable
misc_io_report_period
misc_io_on_report_events
ain_sample_period
ain_threshold
iso15765_separation_time_offset
network_enables_2
iso9141_kwp_settings
See structure
iso_parity;
iso_msg_termination;
iso_tester_pullup_enable;
network_enables_2;
iso9141_kwp_settings2;
See structure
iso_parity_2;
iso_msg_termination_2;
iso9141_kwp_settings_3;
See structure
iso_parity_3;
iso_msg_termination_3;
iso9141_kwp_settings_4;
See structure
iso_parity_4;
iso_msg_termination_4;
fast_init_network_enables;
UART;
See structure
Text_API;
See structure
HSCAN1 : 0
HSCAN3 : 8
MSCAN : 1
CGI : 9
LIN1 : 2
NA : 10
LIN2 : 3
LIN3 : 11
reserved : 4
LIN4 : 12
HSCAN2 : 5
NA : 13
LSFT : 6
NA : 14
SW_CAN : 7
NA : 15
REPORT_ON_PERIODIC : 0
REPORT_ON_LED2 : 8
REPORT_ON_MISC1 : 1
REPORT_ON_KLINE : 9
REPORT_ON_MISC2 : 2
REPORT_ON_MISC3_AIN : 10
REPORT_ON_MISC3 : 3
REPORT_ON_MISC4_AIN : 11
REPORT_ON_MISC4 : 4
REPORT_ON_MISC5_AIN : 12
REPORT_ON_MISC5 : 5
REPORT_ON_MISC6_AIN : 13
REPORT_ON_MISC6 : 6
REPORT_ON_LED1 : 7
KLINE1 : 0
Reserved : 4
KLINE2 : 1
Reserved : 5
KLIN3 : 2
Reserved : 6
LIN2 : 3
HSCAN1 : 0
MSCAN : 1